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基于分数阶线性自抗扰控制的LLC谐振变换器研究

Research on LLC Resonant Converter Based on Fractional Order Linear Active Disturbance Rejection Control

  • 摘要: 针对LLC谐振变换器在传统控制方式下动态性能及抗扰动能力不足的问题,设计出1种分数阶线性自抗扰控制器(FOLADRC),并将其应用于半桥LLC谐振变换器的闭环控制系统。通过扩展描述函数法建立LLC谐振变换器的小信号模型,并通过Matlab降阶处理获得系统传递函数;在线性自抗扰控制器(LADRC)框架基础上,移除导致相位滞后的跟踪微分器环节以消除动态响应延迟,同时采用PDμ控制器替代LADRC中的误差反馈控制律,引入分数阶PID(FOPID)控制器中调节系统动态性能的微分阶次μ,使FOLADRC兼具LADRC的抗扰性能与FOPID控制器的动态性能;进一步推导出FOLADRC的传递函数,通过Matlab绘闭环系统伯德图,基于频域分析法验证控制器的稳定裕度;最后,搭建额定功率为300 W的实验样机,对比测试PID,LADRC和FOLADRC 3种控制策略。结果表明:在加载和减载阶跃工况下,FOLADRC相比PID控制器暂态调节时间分别缩短47.37%和60.00%,相比LADRC分别时间缩短和20.00%和31.03%,显著提升了系统的动态响应速度和抗干扰能力。本文研究通过分数阶控制与自抗扰理论的融合,为LLC谐振变换器的性能优化提供了有效解决方案。

     

    Abstract: To address the issues of poor dynamic performance and weak disturbance rejection capability in LLC resonant converters under traditional control methods, a fractional linear order active disturbance rejection controller (FOLADRC) was designed and applied to the closed-loop control system of a half-bridge LLC resonant converter. Initially, the small-signal model of the LLC resonant converter was obtained through the extended describing function method, and the system transfer function was obtained through reduction in Matlab. Subsequently, based on the framework of linear active disturbance rejection controller (LADRC), the tracking differentiator module responsible for phase lag in LADRC was eliminated to mitigate dynamic response delays. Furthermore, the error feedback control law in LADRC was replaced with a PDμ controller, thereby incorporating the differential order μ from the FOPID controller to regulate system dynamic performance. The designed FOLADRC synergistically combined the active disturbance characteristics of LADRC and the dynamic advantages of FOPID controller. The transfer function of the FOLADRC was analytically derived, and the system’s Bode plot was generated using Matlab. The stability margin of the controller was validated through frequency-domain analysis. Finally, a 300 W experimental prototype was built to compare the performance of PID, LADRC, and FOLADRC control strategies. The results show that in the positive and negative load step response conditions, compared with the PID controller, FOLADRC shortens the transient adjustment time by 47.37% and 60% respectively. Compared with the LADRC, the transient adjustment time is shortened by 20% and 31.03% respectively, significantly improving the system’s dynamic response speed and anti-interference capability. This study provides an effective solution for optimizing the performance of LLC resonant converters through the integration of fractional-order control and active disturbance rejection theory.

     

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